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MC10EP105, MC100EP105 3.3V / 5V ECL Quad 2-Input Differential AND/NAND
Description
The MC10/100EP105 is a quad 2-input differential AND/NAND gate. Each gate is functionally equivalent to the EP05 and LVEL05 devices. With AC performance much faster than the LVEL05 device, the EP105 is ideal for applications requiring the fastest AC performance available. The 100 Series contains temperature compensation.
Features
http://onsemi.com MARKING DIAGRAMS*
* 275 ps Typical Propagation Delay * Maximum Frequency > 3 GHz Typical * PECL Mode Operating Range: VCC = 3.0 V to 5.5 V * NECL Mode Operating Range: VCC = 0 V * * *
with VEE = -3.0 V to -5.5 V Open Input Default State Safety Clamp on Inputs Pb-Free Packages are Available* with VEE = 0 V
MCxxx EP105 AWLYYWWG LQFP-32 FA SUFFIX CASE 873A
1
1
32
QFN32 MN SUFFIX CASE 488AM xxx A WL, L YY, Y WW, W G or G
MCxxx EP105 AWLYYWWG G
= 10 or 100 = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package
(Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet.
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
(c) Semiconductor Components Industries, LLC, 2006
November, 2006 - Rev. 11
1
Publication Order Number: MC10EP105/D
MC10EP105, MC100EP105
D0b D1a D1a D1b D1b D2a D2a D2b D0b D1a D1a D1b D1b D2a D2a D2b 24 D0b D0a D0a VEE Q0 Q0 VCC VCC 25 26 27 28 29 30 31 32 1 2 3 4 5 6 7 8 23 22 21 20 19 18 17 16 15 14 D2b D3a D3a VCC D3b D3b VEE NC D0b D0a D0a VEE Q0 Q0 VCC VCC
25 26 27 28 29 30 31 32 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
D2b D3a D3a VCC D3b D3b VEE NC
MC10EP105 MC100EP105
13 12 11 10 9
Exposed Pad (EP)
VCC Q1 Q1 Q2 Q2 Q3 Q3 VCC VCC Q1 Q1 Q2 Q2 Q3 Q3 VCC
Warning: All VCC and VEE pins must be externally connected to Power Supply to guarantee proper operation.
Figure 1. 32-Lead LQFP Pinout (Top View)
Figure 2. 32-Lead QFN Pinout (Top View)
D0a D0a D0b D0b D1a D1a D1b D1b D2a D2a D2b D2b D3a D3a D3b D3b VEE
Q0 Q0
Table 1. PIN DESCRIPTION
PIN Dna*, Dnb*, Dna*, Dnb* Qn, Qn VCC VEE NC FUNCTION ECL Data Inputs ECL Data Outputs Positive Supply Negative Supply No Connect
Q1 Q1
* Pins will default LOW when left open. Q2
Table 2. TRUTH TABLE
Q2 Dna L L H H Dnb L H L H Dna H H L L Dnb H L H L Qn L L L H Qn H H H L
Q3 Q3
Figure 3. Logic Diagram
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MC10EP105, MC100EP105
Table 3. ATTRIBUTES
Characteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Human Body Model Machine Model Charged Device Model Pb Pkg Level 2 - Value 75 kW N/A > 4 kV > 100 V > 2 kV Pb-Free Pkg Level 2 Level 1
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) LQFP-32 QFN-32 Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Oxygen Index: 28 to 34
UL-94 V-0 @ 0.125 in 444 Devices
Table 4. MAXIMUM RATINGS
Symbol VCC VEE VI Iout IBB TA Tstg qJA qJC qJA qJC Tsol Parameter PECL Mode Power Supply NECL Mode Power Supply PECL Mode Input Voltage NECL Mode Input Voltage Output Current VBB Sink/Source Operating Temperature Range Storage Temperature Range Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Wave Solder Pb Pb-Free 0 lfpm 500 lfpm Standard Board 0 lfpm 500 lfpm 2S2P <2 to 3 sec @ 248C <2 to 3 sec @ 260C 32 LQFP 32 LQFP 32 LQFP 32 QFN 32 QFN 32 QFN Condition 1 VEE = 0 V VCC = 0 V VEE = 0 V VCC = 0 V Continuous Surge VI VCC VI VEE Condition 2 Rating 6 -6 6 -6 50 100 0.5 -40 to +85 -65 to +150 80 55 12 to 17 31 27 12 265 265 Unit V V V mA mA C C C/W C/W C/W C/W C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
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MC10EP105, MC100EP105
Table 5. 10EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 2)
-40C Symbol IEE VOH VOL VIH VIL VIHCMR IIH IIL Characteristic Power Supply Current Output HIGH Voltage (Note 3) Output LOW Voltage (Note 3) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 4) Input HIGH Current Input LOW Current 0.5 Min 45 2165 1365 2090 1365 2.0 Typ 58 2290 1490 Max 75 2415 1615 2415 1690 3.3 150 0.5 Min 45 2230 1430 2155 1460 2.0 25C Typ 59 2355 1555 Max 75 2480 1680 2480 1755 3.3 150 0.5 Min 45 2290 1490 2215 1490 2.0 85C Typ 60 2415 1615 Max 75 2540 1740 2540 1815 3.3 150 Unit mA mV mV mV mV V mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 2. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to -2.2 V. 3. All loading with 50 W to VCC - 2.0 V. 4. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
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MC10EP105, MC100EP105
Table 6. 10EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 5)
-40C Symbol IEE VOH VOL VIH VIL VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 6) Output LOW Voltage (Note 6) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 7) Input HIGH Current Input LOW Current 0.5 Min 45 3865 3065 3790 3065 2.0 Typ 58 3990 3190 Max 75 4115 3315 4115 3390 5.0 Min 45 3930 3130 3855 3130 2.0 25C Typ 59 4055 3255 Max 75 4180 3380 4180 3455 5.0 Min 45 3990 3190 3915 3190 2.0 85C Typ 60 4115 3315 Max 75 4240 3440 4240 3515 5.0 Unit mA mV mV mV mV V
IIH IIL
150 0.5
150 0.5
150
mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 5. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to -0.5 V. 6. All loading with 50 W to VCC - 2.0 V. 7. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
Table 7. 10EP DC CHARACTERISTICS, NECL VCC = 0 V, VEE = -5.5 V to -3.0 V (Note 8)
-40C Symbol IEE VOH VOL VIH VIL VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 9) Output LOW Voltage (Note 9) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 10) Input HIGH Current Input LOW Current 0.5 Min 45 -1135 -1935 -1210 -1935 VEE+2.0 Typ 58 -1010 -1810 Max 75 -885 -1685 -885 -1610 0.0 Min 45 -1070 -1870 -1145 -1870 VEE+2.0 25C Typ 59 -945 -1745 Max 75 -820 -1620 -820 -1545 0.0 Min 45 -1010 -1810 -1085 -1810 VEE+2.0 85C Typ 60 -885 -1685 Max 75 -760 -1560 -760 -1485 0.0 Unit mA mV mV mV mV V
IIH IIL
150 0.5
150 0.5
150
mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 8. Input and output parameters vary 1:1 with VCC. 9. All loading with 50 W to VCC - 2.0 V. 10. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
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MC10EP105, MC100EP105
Table 8. 100EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 11)
-40C Symbol IEE VOH VOL VIH VIL VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 12) Output LOW Voltage (Note 12) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 13) Input HIGH Current Input LOW Current 0.5 Min 45 2155 1355 2075 1355 2.0 Typ 59 2280 1480 Max 80 2405 1605 2420 1675 3.3 Min 45 2155 1355 2075 1355 2.0 25C Typ 62 2280 1480 Max 85 2405 1605 2420 1675 3.3 Min 45 2155 1355 2075 1355 2.0 85C Typ 65 2280 1480 Max 85 2405 1605 2420 1675 3.3 Unit mA mV mV mV mV V
IIH IIL
150 0.5
150 0.5
150
mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 11. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to -2.2 V. 12. All loading with 50 W to VCC - 2.0 V. 13. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
Table 9. 100EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 14)
-40C Symbol IEE VOH VOL VIH VIL VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 15) Output LOW Voltage (Note15) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 16) Input HIGH Current Input LOW Current 0.5 Min 45 3855 3055 3775 3055 2.0 Typ 63 3980 3180 Max 80 4105 3305 4120 3375 5.0 Min 45 3855 3055 3775 3055 2.0 25C Typ 66 3980 3180 Max 85 4105 3305 4120 3375 5.0 Min 45 3855 3055 3775 3055 2.0 85C Typ 69 3980 3180 Max 85 4105 3305 4120 3375 5.0 Unit mA mV mV mV mV V
IIH IIL
150 0.5
150 0.5
150
mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 14. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to -0.5 V. 15. All loading with 50 W to VCC - 2.0 V. 16. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
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MC10EP105, MC100EP105
Table 10. 100EP DC CHARACTERISTICS, NECL VCC = 0 V, VEE = -5.5 V to -3.0 V (Note 17)
-40C Symbol IEE VOH VOL VIH VIL VIHCMR Characteristic Power Supply Current VCC = -3.3 V VCC = -5.0 V Min 45 45 -1145 -1945 -1225 -1945 VEE+2.0 Typ 59 63 -1020 -1820 Max 80 80 -895 -1695 -880 -1625 0.0 Min 45 45 -1145 -1945 -1225 -1945 VEE+2.0 25C Typ 62 66 -1020 -1820 Max 85 85 -895 -1695 -880 -1625 0.0 Min 45 45 -1145 -1945 -1225 -1945 VEE+2.0 85C Typ 65 69 -1020 -1820 Max 85 85 -895 -1695 -880 -1625 0.0 Unit mA mV mV mV mV V
Output HIGH Voltage (Note 18) Output LOW Voltage (Note 18) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 19) Input HIGH Current Input LOW Current
IIH IIL
150 0.5 0.5
150 0.5
150
mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 17. Input and output parameters vary 1:1 with VCC. 18. All loading with 50 W to VCC - 2.0 V. 19. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
Table 11. AC CHARACTERISTICS VCC = 0 V; VEE = -3.0 V to -5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 20)
-40C Symbol fmax tPLH, tPHL tSKEW tJITTER VPP tr tf Characteristic Maximum Frequency (See Figure 4 Fmax/JITTER) Propagation Delay to Output Differential Within Device Skew Device to Device Skew (Note 21) Cycle-to-Cycle Jitter (See Figure 4 Fmax/JITTER) Input Voltage Swing (Differential Configuration) Output Rise/Fall Times (20% - 80%) Q 150 100 175 Min Typ >3 250 10 0.2 800 150 325 50 <1 1200 200 150 120 200 Max Min 25C Typ >3 275 10 0.2 800 170 350 50 <1 1200 220 150 150 225 Max Min 85C Typ >3 300 15 0.2 800 200 375 50 <1 1200 250 Max Unit GHz ps ps ps mV ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 20. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC - 2.0 V. 21. Skew is measured between outputs under identical transitions.
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MC10EP105, MC100EP105
1000 900 800 VOUTpp (mV) 700 600 500 400 300 200 100 0 (JITTER) 10 9 8 7 6 5 4 3 2 1 4000 5000 JITTER OUT ps (RMS)
0
1000
2000
3000
FREQUENCY (MHz)
Figure 4. Fmax/Jitter
Q Driver Device Q
Zo = 50 W
D Receiver Device
Zo = 50 W 50 W 50 W
D
VTT VTT = VCC - 2.0 V
Figure 5. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D - Termination of ECL Logic Devices.)
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EE EE
EEEEEEEEEE EEEEEEEEEE
MC10EP105, MC100EP105
ORDERING INFORMATION
Device MC10EP105FA MC10EP105FAG MC10EP105FAR2 MC10EP105FAR2G MC100EP105FA MC100EP105FAG MC100EP105FAR2 MC100EP105FAR2G MC10EP105MNG MC100EP105MNG MC10EP105MNR4G MC100EP105MNR4G QFN-32 (Pb-Free) Package LQFP-32 LQFP-32 (Pb-Free) LQFP-32 LQFP-32 (Pb-Free) LQFP-32 LQFP-32 (Pb-Free) LQFP-32 LQFP-32 (Pb-Free) Shipping 250 Units / Tray 250 Units / Tray 2000 / Tape & Reel 2000 / Tape & Reel 250 Units / Tray 250 Units / Tray 2000 / Tape & Reel 2000 / Tape & Reel 74 Units / Rail 74 Units / Rail 1000 / Tape & Reel 1000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D AN1406/D AN1503/D AN1504/D AN1568/D AN1672/D AND8001/D AND8002/D AND8020/D AND8066/D AND8090/D - ECL Clock Distribution Techniques - Designing with PECL (ECL at +5.0 V) - ECLinPSt I/O SPiCE Modeling Kit - Metastability and the ECLinPS Family - Interfacing Between LVDS and ECL - The ECL Translator Guide - Odd Number Counters Design - Marking and Date Codes - Termination of ECL Logic Devices - Interfacing with ECLinPS - AC Characteristics of ECL Devices
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MC10EP105, MC100EP105
PACKAGE DIMENSIONS
32 LEAD LQFP CASE 873A-02 ISSUE C
-T-, -U-, -Z- AE P V V1 DETAIL Y
BASE METAL
32
A1
A
25
4X
0.20 (0.008) AB T-U Z
1
-T- B B1
8
-U-
17
9
S1 S
8X M_
R
J
G -AB-
SEATING PLANE
DETAIL AD CE
SECTION AE-AE
-AC- 0.10 (0.004) AC 0.250 (0.010) H W X DETAIL AD
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DATUM PLANE -AB- IS LOCATED AT BOTTOM OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE. 4. DATUMS -T-, -U-, AND -Z- TO BE DETERMINED AT DATUM PLANE -AB-. 5. DIMENSIONS S AND V TO BE DETERMINED AT SEATING PLANE -AC-. 6. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.250 (0.010) PER SIDE. DIMENSIONS A AND B DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE -AB-. 7. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. DAMBAR PROTRUSION SHALL NOT CAUSE THE D DIMENSION TO EXCEED 0.520 (0.020). 8. MINIMUM SOLDER PLATE THICKNESS SHALL BE 0.0076 (0.0003). 9. EXACT SHAPE OF EACH CORNER MAY VARY FROM DEPICTION. MILLIMETERS MIN MAX 7.000 BSC 3.500 BSC 7.000 BSC 3.500 BSC 1.400 1.600 0.300 0.450 1.350 1.450 0.300 0.400 0.800 BSC 0.050 0.150 0.090 0.200 0.450 0.750 12_ REF 0.090 0.160 0.400 BSC 1_ 5_ 0.150 0.250 9.000 BSC 4.500 BSC 9.000 BSC 4.500 BSC 0.200 REF 1.000 REF INCHES MIN MAX 0.276 BSC 0.138 BSC 0.276 BSC 0.138 BSC 0.055 0.063 0.012 0.018 0.053 0.057 0.012 0.016 0.031 BSC 0.002 0.006 0.004 0.008 0.018 0.030 12_ REF 0.004 0.006 0.016 BSC 1_ 5_ 0.006 0.010 0.354 BSC 0.177 BSC 0.354 BSC 0.177 BSC 0.008 REF 0.039 REF
K
Q_
GAUGE PLANE
DIM A A1 B B1 C D E F G H J K M N P Q R S S1 V V1 W X
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10
0.20 (0.008)
9
-Z-
0.20 (0.008) AC T-U Z
F
D
M
4X
EE EE EE EE
N
AC T-U Z
DETAIL Y
AE
MC10EP105, MC100EP105
PACKAGE DIMENSIONS
QFN32 5*5*1 0.5 P CASE 488AM-01 ISSUE O
D A B
NOTES: 1. DIMENSIONS AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM TERMINAL 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. MILLIMETERS MIN NOM MAX 0.800 0.900 1.000 0.000 0.025 0.050 0.200 REF 0.180 0.250 0.300 5.00 BSC 2.950 3.100 3.250 5.00 BSC 2.950 3.100 3.250 0.500 BSC 0.200 --- --- 0.300 0.400 0.500
2X 2X
0.15 C 0.15 C 0.10 C
32 X
0.08 C L
32 X 9 8
1
b 0.10 C A B
32 X
0.05 C BOTTOM VIEW
32 X
ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative
EE
TOP VIEW SIDE VIEW D2
16 17 32 25
PIN ONE LOCATION
E
(A3) A A1 C
EXPOSED PAD 32 X SEATING PLANE
DIM A A1 A3 b D D2 E E2 e K L
K
SOLDERING FOOTPRINT*
5.30 3.20 0.63
32 X
E2
24
e
3.20
5.30
0.28
0.50 PITCH
28 X
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MC10EP105/D

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